Generally, in the industry a two-piece mold, upper mold and lower mold, is used in a transfer molding process for encapsulating a semiconductor chip and a substrate to which the semiconductor chip is attached with a molding compound. The reason why a two-piece mold is currently widely employed by the industry is that drawbacks such as low productivity, increase in complexity of molding and high cost of manufacture still exist in a three-piece or a modified two-piece mold, making them unsuitable for mass production. However, in a conventional two-piece mold composed of an upper mold and a lower mold, each having a mold cavity, a gate should be provided for molten molding compound to flow from a runner connected to a central reservoir storing the molten molding compound, into the mold cavities where the molten molding compound is solidified and formed into an encapsulant enclosing the semiconductor chip and substrate. The gate is provided for control of the flow and injection velocity of the molten molding compound from the runner into the mold cavity. When the encapsulant is solidified in the mold cavities, excess molding compound in the runner and the gate is also solidified on areas of the substrate on which the runner and the gate are correspondingly located and thus has to be removed or degated from the substrate. Usually, these areas are called "degating region."
In order to manufacture a quality semiconductor package, excellent adhesion of the molding compound to the semiconductor chip and substrate is required. When the excess molding compound in the runner and gate is removed, however, the substrate is subject to delimitation at the time the adhesive force between the molding compound and the substrate exceeds the cohesive strength of the substrate itself. This creates a defective product which is undesirable. In addition, due to excellent adhesion between the molding compound and the substrate, the substrate is easily deformed while removing the excess molding compound in the runner and gate from the substrate. The semiconductor package thus-obtained will then become defective if the substrate is deformed.
In order to resolve the above-mentioned problem, U.S. Pat. No. 5,542,171 discloses a method of making a semiconductor package, which comprises the following steps as shown in FIG. 8:
101 attaching a semiconductor chip to a substrate; PA1 102 electrically connecting the semiconductor chip to the substrate by means of wire bonding; PA1 103 using plasma, etching or sputter etching to clean the impurities on the surfaces of the semiconductor chip and the chip-attached substrate; PA1 104 selectively contaminating the degating region preset on the substrate in order to reduce adhesion between the contaminated areas of the substrate and an molding compound subsequently enclosing the substrate; PA1 105 encapsulating the semiconductor chip and the substrate by molding a molten molding compound over the semiconductor chip and the substrate; and PA1 106 degating the remainder of the molding compound formed on said contaminated areas of the substrate.
More specifically, in accordance with the disclosure of the U.S. Pat. No. 5,542,171, a semiconductor chip is attached onto and then electrically bonded to a substrate; the surface of the substrate to which the semiconductor chip is attached is subsequently cleaned by plasma in order to remove impurities thereon, so that the molding compound can have greater adhesion to the semiconductor chip and substrate after the molding compound is hardened. Subsequent to the completion of the cleaning, a polymer coating or a layer of permanent ink is contaminatively applied on the preset degating region of the substrate (i.e., those area where runners and gates are located); after the substrate has been selectively contaminated, transfer molding is performed to encapsulate the semiconductor chip and substrate. Because the surface of the substrate has been selectively contaminated with a polymer coating or a layer of permanent ink on the degating region of the substrate, the adhesion of the molding compound to the contamination layer is significantly less than the adhesion of the molding compound formed into the encapsulant to the substrate. Therefore, the molding compound in the runner and gate can be easily degated and cleanly peeled away from the contamination layer on the substrate without resulting in damage to or deformation of the substrate. However, there still exits drawbacks in the prior art process.
The contamination is performed after the semiconductor chip is mounted on and electrically connected to the substrate by wire bonding. Therefore, the contamination treatment would also contaminate the semiconductor chip and/or gold wires on the substrate, resulting in a defective product. In other words, the contamination treatment has to be carefully and accurately carried out in order to prevent the semiconductor chip and gold wires from being contaminated, so that the contamination will increase the manufacturing cost and be time-consuming. In addition, although the contamination favors the removal of the molding compound in the runner and gate from the substrate, the contaminative layer still adheres to the substrate and has to be removed after the molding compound in the runner and gate breaks away from the substrate. It is more difficult to remove the contaminative coating from the substrate because of its secure adhesion to the surface of the degating region of the substrate. Accordingly, the removal of the contaminative coating will increase the manufacturing cost and complicate the packaging process. Furthermore, since the quality requirement for semiconductor packages is increasing, the adhesive force between the molding compound and the substrate as well as that between the semiconductor chip and the substrate have to be increased so as to prevent incomplete adhesion from taking place. Therefore, molding compound of high viscosity is usually used as the encapsulating material making the adhesion between the molding compound and the contaminative coating accordingly enhanced. It may, as a result, cause the adhesive force between the contaminative coating and the surface of the substrate to be unable to exceed the adhesive force between the contaminative coating and the molding compound, thus making the molding compound solidified and formed on the contaminative coating failed to be completely removed. Consequently, damage to or distortion of the substrate may occur.
In view of the drawbacks posed by U.S. Pat. No. 5,542,171, Amkor U.S. Pat. No. 5,635,671 proposes another method of making a semiconductor package. The method features in that a metallic layer (gold or palladium) is pre-plated on the degating region of the substrate before the transfer molding, so that the adhesive force between the molding compound and the metallic layer is less than the adhesive force between the molding compound and the substrate. This makes it easier to degate the molding compound from the surface of the metallic layer without damaging the substrate or the encapsulant. However, this method still poses drawbacks which call for improvement.
Expensive metals such as gold or palladium are used as the metallic layer which will increase the manufacturing cost. Further, since molding compound of high viscosity has to be used as the encapsulating material for molding, the problem of incomplete removal of the molding compound from the metallic layer as set forth above still exists because of the strength of the adhesion between the molding compound and the surface of metallic layer, thus easily making damage to the substrate and the encapsulant itself. In addition, as shown in FIG. 7, a metallic layer 614 is plated on a substrate according to this prior art; the material of the metallic layer 614 is different form that of the substrate, and thermal stress varies greatly from the beginning to the end of the transfer molding i.e., from about 175.degree. C. to ambient temperature, distortion of the substrate will unavoidably take place.